Tracking at

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Test boards: VisionFive2 

We will be changing the test boards soon: a new SoC w/ full media & connectivity support and vector/crypto extensions.


There are consumer electronics running .NET applications on Linux (Tizen), which are going to try RISC-V CPUs.

Project Scope and Timelines

The functional capability (passing the unit tests except for performance criteria) of runtime and libraries for RISC-V (RV64) is required by 2Q, 2024.

In 2023, .NET Runtime RISC-V port effort will focus on completing its JIT functions and codegen.

Extension support (Vector and Crypto), AOT compilers, JIT optimizations, are scheduled after that.

Components and Repos


Task/Issue Tracking:

Related Pull Requests (a few examples)

Stakeholders and Partners

  • .NET RISC-V Port Implementation (Samsung / Contact: MyungJoo Ham , clamp03@github, gbalykov@github, t-mustafin@github, alpencolt@github, zer011b@github, )
  • .NET Project Maintenance & Review (Microsoft .NET team)


Name or CategoryWG LinkUrgencyImpactStatus
libunwind (resolved)

lldb (resolved)

DP_02_001 - LLDB for RV64
(Code submitted? )

(can wait until 24.Q2)
High (Required)

.NET runtime RISC-V port is not ready for debugging support, yet.

binary toolchain packages (resolved)CT_03_001 - Binary Toolchain PackagesHighMid (Recommended)Currently using custom binaries
more efficient emulator (resolved)

SE_01_001 - QEMU linux-user riscv_hwprobe syscall support

SE_02_001 - QEMU Vector crypto support

MidLow (Performance)

Measure of Success

Either one of the two:

Scenario 1: It passes the testing facilities in .NET upstream CI (DONE)
                 and Microsoft (or its upstream maintainers) announces that it officially supports RISC-V (WIP: It's in .NET 8 Preview)

Scenario 2: Tizen releases RISC-V OS images including .NET runtime, libraries, and API/SDK. (WIP: Targets 25' release)

RISE Requirements

It'd be great to have, but not "required":

  • Find people who's interested in porting .NET on RISC-V and let them participate.
  • Get Microsoft involved in RISE and put their own effort on RISC-V ports.

Status Updates

Add key updates here, using heading 2 with the update date as the title.

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