Link to Spreadsheet
| Topic ID | Topic Name | Priority | Development | Upstreaming | Dependency | Tentative ETA | Company | Contact | Comments |
| Spike (00) | |||||||||
| SE_00_001 | Spike Vector code cleanup | Medium | Unknown | Unknown | 2024 | Rivos | ? | ||
| SE_00_002 | Spike ongoing enhancement | Unknown | Unknown | Unknown | ? | SiFive | ? | ||
| QEMU (01) | |||||||||
| SE_01_001 | QEMU linux-user riscv_hwprobe syscal support | High | Completed | InProgress | Q3 2023 | Rivos | Robbin Ehn | [PATCH] linux-user/riscv: Add syscall riscv_hwprobe | |
| SE_01_002 | QEMU AIA support enhancements - IRQ filtering | High | Completed | InProgress | Q2 2023 | Rivos | Rajnesh Kanwal | [PATCH v2 0/6] target/riscv: Add RISC-V Virtual IRQs and IRQ filtering support | |
| SE_01_003 | QEMU WorldGuard support | High | Unknown | NotStarted | Q3 2023 | SiFive | Jim Shu | Feature was mentioned in a perhaps related series: [PATCH v3] hw/riscv/virt: Add a second UART for secure world | |
| SE_01_004 | QEMU IOPMP support | High | Completed | Unknown | Q4 2023 | Andes | Rich Chuang | ||
| SE_01_005 | QEMU PCIe passthru on x86 hosts | High | Completed | NotStarted | Q4 2023 | Intel | Fei Wu (Intel) | ||
| SE_01_006 | QEMU vendor extension framework support | High | InProgress | InProgress | ? | T-Head | Yunhai (Alibaba) | Split from an unique item in the old table. How does this relate with "[PATCH 0/9] disas/riscv: Add vendor extension support"? | |
| SE_01_007 | QEMU Profile Extension support | Unknown | Unknown | NotStarted | ? | T-Head | Yunhai (Alibaba) | Split from an unique item in the old table | |
| SE_01_008 | QEMU SXL32 support | Medium | NotStarted | NotStarted | ? | T-Head | Yunhai (Alibaba) | Split from an unique item in the old table | |
| SE_01_009 | QEMU ACPI support for AIA | High | Completed | InProgress | Q4 2023 | Ventana | Sunil V L | ||
| SE_01_010 | QEMU ACPI support for PLIC | High | Completed | NotStarted | Q4 2023 | Intel | Haibo Xu | ||
| SE_01_011 | QEMU RVA22U64/S64 profile support | High | InProgress | NotStarted | Q4 2023 | Ventana | Daniel Barboza | ||
| SE_01_012 | QEMU RISC-V TCG target support | Medium | NotStarted | NotStarted | 2024 | Enable qemu linux-user mode when running in native RiSC-V to run binaries from other architectures | |||
| SE_01_013 | QEMU API query CPU extensions | Unknown | NotStarted | NotStarted | LIU Zhiwei | ||||
| SE_01_014 | QEMU query-cpu-model-expansion API | High | Completed | InProgress | Q4 2023 | Ventana | Daniel Barboza | ||
| SE_01_015 | QEMU RISC-V IOMMU support | High | Completed | InProgress | Q4 2023 | Rivos | Tomasz Jeznach | ||
| SE_01_016 | QEMU linux-user hwprobe kernel parity | Unknown | InProgress | InProgress | 2024 | Ventana | Daniel Barboza | ||
| SE_01_017 | QEMU ACPI SPCR support for RISC-V | Medium | InProgress | NotStarted | 1H2024 | Community (StartFive) | JeeHeng Sia | ||
| SE_01_018 | QEMU ACPI PPTT support for RISC-V | Medium | InProgress | NotStarted | 1H2024 | Community (StartFive) | JeeHeng Sia | ||
| SE_01_019 | QEMU ACPI SRAT/SLIT(NUMA) support for RISC-V | Medium | InProgress | NotStarted | 1H2024 | Intel | Haibo Xu | ||
| SE_01_020 | QEMU SMBIOS support for RISC-V | Medium | NotStarted | NotStarted | 2H2024 | Intel | Haibo Xu | ||
| SE_01_021 | QEMU RVA23 profile support | NotStarted | NotStarted | NotStarted | 2024 | Ventana | Daniel Barboza | ||
| QEMU Vector-related Support (02) | |||||||||
| SE_02_001 | QEMU Vector Crypto support | High | InProgress | InProgress | Q2 2023 | SiFive | Frank Chang | In conjuntion with CodeThink, [PATCH v3 00/19] Add RISC-V vector cryptographic instruction set support | |
| SE_02_002 | QEMU Vector/Crypto and other ISA extension support | High | Unknown | Unknown | Q4 2023 | Andes | Rich Chuang | ||
| SE_02_003 | QEMU Vector TCG Host-Native implementation | Unknown | Unknown | NotStarted | 2024 | SiFive | Frank Chang | ||
| SE_02_004 | QEMU RVV performance enhancements | Low | InProgress | NotStarted | 2024 | Ventana | Daniel Barboza | Long term item that will require core TCG changes. Any help welcome | |
| Uncategorized items (03) | |||||||||
| SE_03_001 | Remove prematurely merged non-standards from QEMU | Medium | Unknown | NotStarted | 2024 | SiFive | Paul Walmsley <paul.walmsley@sifive.com> | ACLINT | |