About
Enable the basic ACPI infrastructure for RISC-V. Supporting external interrupt controllers is a separate project and hence it is tested using poll based HVC SBI console and RAM disk.
Below are two ECRs approved by ASWG which are required for this project.
RINTC - https://drive.google.com/file/d/1R6k4MshhN3WTT-hwqAquu5nX6xSEqK2l/view
RHCT - https://drive.google.com/file/d/1nP3nFiH4jkPMp6COOxP6123DCZKR-tia/view
Status
Updates
- Project reported as priority for 2H23