During an evaluation of the GDB test suite on RISC-V, it was discovered that the GDB Simulator (used by the GDB test suite) only supports RV64G and RV32G models.

This work will add support for the C extension (compressed instructions, Zc), allowing for RV64GC and RV32GC models to be selected and ran. This is important because many of the C libraries that can be used when building GDB make use of Zc instructions. (Also CSR instructions are not properly handled).




Development TimelineQ3 2023


Upstream Version






  • Reported commencement of development effort


  • The scope of this task has increased to include support for single and double precision floating point and to provide some semihosting facilities
  • With these additions, it is anticipated that the GDB test suite will have 100% successful coverage on RISC-V
  • This takes us into early Q4 (end of October)




  1. This looks like a good candidate for 2023-2H, what's your upstream plan? I will move it to 2023-2H if you are okay with it.

    1. Hi Fei, we have implemented simulation of compressed integer instructions and testing is in progress. We will then add floating-point instructions and semi-hosting.

      1. Great, thank you for your efforts.

  2. We have submitted our first patch that implements compressed integer instruction set ("c") and semi-hosting. The patch is being discussed here: https://sourceware.org/pipermail/gdb-patches/2023-October/203337.html. We have also finished implementation of F and D instructions. We will start upstreaming these patches soon.

    1. Great, and what's the status now?